Innitial commit, rev. 0.1

Schematic only
This commit is contained in:
2022-10-15 11:36:54 +02:00
commit ac5dc38b46
22 changed files with 9904 additions and 0 deletions

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.assets/memdump_hw.pdf Normal file

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.gitignore vendored Normal file
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./fp-info-cache
./memdump_hw-backups
./memdump_hw.kicad_sch-bak

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fp-info-cache Normal file
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0

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memdump.kicad_sym Normal file
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(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
(symbol "CD4016B" (in_bom yes) (on_board yes)
(property "Reference" "U" (id 0) (at 3.81 13.97 0)
(effects (font (size 1.27 1.27)))
)
(property "Value" "CD4016B" (id 1) (at 6.35 -13.97 0)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (id 2) (at -60.198 -4.572 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "" (id 3) (at -60.198 -4.572 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "CD4016B_0_1"
(rectangle (start -7.62 12.7) (end 7.62 -12.7)
(stroke (width 0.1524) (type default) (color 0 0 0 0))
(fill (type background))
)
)
(symbol "CD4016B_1_1"
(pin input clock (at -10.16 -5.08 0) (length 2.54)
(name "CLKB" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 2.54 180) (length 2.54)
(name "Q4A" (effects (font (size 1.27 1.27))))
(number "10" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 -7.62 180) (length 2.54)
(name "Q3B" (effects (font (size 1.27 1.27))))
(number "11" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 -5.08 180) (length 2.54)
(name "Q2B" (effects (font (size 1.27 1.27))))
(number "12" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 -2.54 180) (length 2.54)
(name "Q1B" (effects (font (size 1.27 1.27))))
(number "13" (effects (font (size 1.27 1.27))))
)
(pin input line (at -10.16 -7.62 0) (length 2.54)
(name "RSTB" (effects (font (size 1.27 1.27))))
(number "14" (effects (font (size 1.27 1.27))))
)
(pin input line (at -10.16 -2.54 0) (length 2.54)
(name "DB" (effects (font (size 1.27 1.27))))
(number "15" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 15.24 270) (length 2.54)
(name "VDD" (effects (font (size 1.27 1.27))))
(number "16" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 -10.16 180) (length 2.54)
(name "Q4B" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 5.08 180) (length 2.54)
(name "Q3A" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 7.62 180) (length 2.54)
(name "Q2A" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin output line (at 10.16 10.16 180) (length 2.54)
(name "Q1A" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
(pin input line (at -10.16 5.08 0) (length 2.54)
(name "RSTA" (effects (font (size 1.27 1.27))))
(number "6" (effects (font (size 1.27 1.27))))
)
(pin input line (at -10.16 10.16 0) (length 2.54)
(name "DA" (effects (font (size 1.27 1.27))))
(number "7" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 -15.24 90) (length 2.54)
(name "VSS" (effects (font (size 1.27 1.27))))
(number "8" (effects (font (size 1.27 1.27))))
)
(pin input clock (at -10.16 7.62 0) (length 2.54)
(name "CLKA" (effects (font (size 1.27 1.27))))
(number "9" (effects (font (size 1.27 1.27))))
)
)
)
)

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memdump_hw.kicad_pcb Normal file
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(kicad_pcb (version 20211014) (generator pcbnew)
)

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memdump_hw.kicad_prl Normal file
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{
"board": {
"active_layer": 0,
"active_layer_preset": "All Layers",
"auto_track_width": true,
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": true,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
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1,
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],
"visible_layers": "fffffff_ffffffff",
"zone_display_mode": 0
},
"meta": {
"filename": "memdump_hw.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}

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memdump_hw.kicad_pro Normal file
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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"rules": {
"min_copper_edge_clearance": 0.0,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": []
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
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0,
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],
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],
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]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "memdump_hw.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"e63e39d7-6ac0-4ffd-8aa3-1841a4541b55",
""
]
],
"text_variables": {}
}

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memdump_hw.kicad_sch Normal file

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memdump_hw.kicad_sch-bak Normal file

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sym-lib-table Normal file
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(sym_lib_table
(lib (name "memdump")(type "KiCad")(uri "${KIPRJMOD}/memdump.kicad_sym")(options "")(descr ""))
)