mirror of
https://github.com/Derisis13/AT-VFD.git
synced 2025-12-06 19:32:49 +01:00
Derisis13
60a7b1309e
* bugfix: correct order of setting `DDRn` and `PORTn` * optimisation: `enum` and `static const` instead of macros * optimisation: `PT6302_startup` is now `inline` * optimisation: functions are now static * bugfix: `data` is now rotated and stored instead of just rotating * special thanks to @kissadamfkut for pointing all of this out to me
70 lines
1.5 KiB
C
70 lines
1.5 KiB
C
#define F_CPU 8000000UL
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#include <avr/io.h>
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#include <util/delay.h>
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/* PT6302 timing constants, all in usec */
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static const uint8_t TCW = 1; //CLKB pulse width
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static const uint8_t TDOFF = 8; //Data processing time
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static const uint8_t DTCSH = 16; //time difference between tDOFF and tCSH
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static const uint8_t TPRZ = 100; //VDD rise time
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static const uint8_t TWRSTB = 1; //RSTB pulse width
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enum pins {
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RSTpin = (1 << PC2),
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CSBpin = (1 << PB0),
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CLKBpin = (1 << PB6),
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DINpin = (1 << PB7),
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};
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static inline void PT6302_startup (void)
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{
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DDRB |= (CSBpin | CLKBpin | DINpin);
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DDRC |= RSTpin;
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PORTB |= (CSBpin | CLKBpin);
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PORTB &= ~DINpin;
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PORTC |= RSTpin;
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_delay_us (TPRZ);
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PORTC &= ~RSTpin;
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_delay_us (TWRSTB);
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}
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static void transmit_bytes (const uint8_t *payload, const uint8_t size)
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{
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PORTB &= ~CSBpin;
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for (int i = 0; i < size; ++i)
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{
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uint8_t data = payload[i];
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for (int j = 0; j < 8; ++j, data >>= 1)
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{
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PORTB &= ~CLKBpin;
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if ((data & 0x01) == 0)
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{
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PORTB |= DINpin;
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}
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else
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{
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PORTB &= ~DINpin;
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}
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_delay_us (TCW);
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PORTB |= CLKBpin;
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_delay_us (TCW);
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}
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_delay_us (TDOFF);
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}
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_delay_us (DTCSH);
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PORTB |= CSBpin;
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}
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int main ()
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{
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PT6302_startup ();
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DDRC |= (1 << PC4);
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while (1)
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{
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PORTC |= (1 << PC4);
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_delay_ms (1000);
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PORTC &= ~(1 << PC4);
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_delay_ms (1000);
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}
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}
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